Progettazione digitale

Richiedendo prerequisiti minimi sotto l’aspetto informatico, tecnologico e matematico, il testo si propone di presentare principi e metodologie fondamentali per il progetto di sistemi digitali e guida lo studente mediante problemi via via più avanzati attraverso le problematiche tipiche del progetto digitale. Poiché attualmente gran parte del progetto digitale viene realizzato servendosi di strumenti di progettazione automatica (i vari tool CAD), il testo tratta costantemente la teoria facendo anche riferimento alla possibilità di sperimentazione pratica basata su strumenti automatici di progettazione. Questo approccio risulta sicuramente innovativo e stimolante e costituisce uno dei contributi principali del libro alla didattica sulla progettazione digitale

Automatic synthesis of OSCI TLM-2.0 models into RTL bus-based IPs

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Integrating heterogeneous embedded systems through language translation and abstraction

The paper summarizes a bottom-up modeling and simulation methodology that starts from heterogeneous models written in heterogeneous languages and it composes them into a homogenous system-level description by exploiting automatic translation and abstraction. This allows the designer to work with his/her favorite design language for representing the heterogeneous behaviors of an embedded system (digital hw, analog hw, software, network, environment, ...), but these heterogeneous low level descriptions can be abstracted into a homogeneous system level model for verification, design space exploration, extra-functional properties validation, etc. This huge heterogeneity is particularly evident in smart systems, to whom the methodology has been effectively applied

Implicit Test Pattern Generation Constrained to Cellular Automata Embedding

This paper presents an implicit methodology that constrains a test pattern generator to identify test sequences which can be reproduced by cellular automata (CA). The so identified CA can be synthesized as an autonomous finite state machine and can be attached to the inputs of a circuit under test (e.g., a controller). In this way, the circuit under test preserves its integrity and its performance is not affected by the proposed testing technique. The overall device (controller+CA) is an off-line self-testable circuit which can potentially self-test all stuck-at faults both of the controller and the CA. Thus, the method can be viewed as a BIST strategy based on the embedding of deterministic test sequences. 1. Introduction The design of ASICs, particularly in the Telecom field, is often based on medium-size controllers embedded into a complex set of modules. Such controllers usually occupy a fraction of the area of the entire device, but play a key role in the global functionality and..